Multi-Objective Optimization of CMOS Folded-Cascode OTAs Using Diverse Evolutionary Algorithms

Abstract

The manual development of CMOS-based analog circuits continues to pose significant challenges, largely due to device scaling, process-induced variations, and the nonlinear interactions among multiple interdependent design parameters. These complexities necessitate the advancement of automated methodologies to improve efficiency, scalability, and reliability in analog design. In this study, the Cuckoo Search (CS) algorithm is investigated as a robust evolutionary framework for the automated sizing of CMOS analog circuits, with particular emphasis on the Folded Cascode Operational Transconductance Amplifier (FOTA) implemented in both 0.18 µm and 0.35 µm CMOS technologies. To provide a rigorous comparative analysis, the performance of CS is benchmarked against two widely employed evolutionary algorithms, namely Differential Evolution (DE) and Particle Swarm Optimization (PSO). All algorithms were implemented in the C programming language, interfaced with the NGSPICE  simulator, and executed on an Intel® Core™ i5 processor (2.40 GHz, 8 GB RAM) under the Ubuntu operating system. The experimental findings reveal that CS consistently exhibits superior performance in terms of success rate, convergence reliability, and robustness. Specifically, in the case of the 0.35 µm FOTA design, CS achieved convergence to all target specifications in 9 out of 10 independent runs, outperforming DE (eight successes) and PSO (five successes). Comparable superiority of CS was also observed for the 0.18 µm process, thereby validating its potential across multiple technology nodes. This study demonstrates that CS not only provides superior optimization outcomes compared to DE and PSO but also establishes itself as a highly effective and reliable evolutionary framework for automated analog circuit design. The cross-technology validation and performance benchmarking highlight its practical relevance in advancing analog design automation.